ÇELEBİ, A. Et Al. 2007. Implementation of Constrained 1-Bit Transform based motion estimation algorithm with an FPGA based architecture. IEEE 15th Signal Processing and Communications Applications Conference , (Eskişehir, Turkey), 1005-1006.

ÇELEBİ, A., URHAN, O., ERTÜRK, S., & Duendar, G., (2007). Implementation of Constrained 1-Bit Transform based motion estimation algorithm with an FPGA based architecture . IEEE 15th Signal Processing and Communications Applications Conference (pp.1005-1006). Eskişehir, Turkey

ÇELEBİ, ANIL Et Al. "Implementation of Constrained 1-Bit Transform based motion estimation algorithm with an FPGA based architecture," IEEE 15th Signal Processing and Communications Applications Conference, Eskişehir, Turkey, 2007

ÇELEBİ, ANIL Et Al. "Implementation of Constrained 1-Bit Transform based motion estimation algorithm with an FPGA based architecture." IEEE 15th Signal Processing and Communications Applications Conference , Eskişehir, Turkey, pp.1005-1006, 2007

ÇELEBİ, A. Et Al. (2007) . "Implementation of Constrained 1-Bit Transform based motion estimation algorithm with an FPGA based architecture." IEEE 15th Signal Processing and Communications Applications Conference , Eskişehir, Turkey, pp.1005-1006.

@conferencepaper{conferencepaper, author={ANIL ÇELEBİ Et Al. }, title={Implementation of Constrained 1-Bit Transform based motion estimation algorithm with an FPGA based architecture}, congress name={IEEE 15th Signal Processing and Communications Applications Conference}, city={Eskişehir}, country={Turkey}, year={2007}, pages={1005-1006} }