Research Information System
21st International Symposium on Power Electronics (Ee), Novi-Sad, Serbia, 27 - 30 October 2021, (Full Text)
In inverter applications requiring high power and high voltage, the voltage stress on the switching elements of conventional inverters is high. Multilevel inverters are preferred over conventional inverters to reduce this voltage stress. Within the scope of this article, a study on Diode Clamped Multi-Level Inverter is presented. The Phase Disposition, Phase Opposition Displacement and Alternative Phase Opposition Displacement which are the Sinusoidal Pulse Width Modulation arrays, present different comparative modulation on the five-level diode clamped inverter. In this study, inverter topologies were shown according to the number of levels, current paths were determined according to the number of levels, different modulation techniques for triggering the switching element were explained, and harmonic analysis was performed in Phase Disposition, Phase Opposition Displacement and Alternative Phase Opposition Displacement arrays in no-load and RL-load state according to the determined level numbers. The whole study was conducted in Matlab / Simulink environment and according to the simulation results, a five-level diode clamped inverter with a total harmonic distortion value of 16.82% in the no-load condition and PD array gave the best result.