Integer 1-Bit Transform Method and its Hardware Architecture for Low-Complexity Block-Based Motion Estimation


Yavuz S., TAŞYAPI ÇELEBİ A. , ÇELEBİ A. , URHAN O.

25th Signal Processing and Communications Applications Conference (SIU), Antalya, Türkiye, 15 - 18 Mayıs 2017

Özet

The need for coding efficiency is being increased with applications in which high resolution video processing is being performed. Power consumption and memory are important constraints for devices capable of recording and transmitting video, such as ultra-high definition televisions (UHD TVs), cameras, smartphones. In video encoders, motion estimation is the process which utilizes the most complex tasks and consumes most of the power. Therefore, low complexity motion estimation methods have been developed which can provide efficient hardware architectures. In this work, a novel integer 1-bit transform method is proposed. Additionally, proposed method and multiplication-free one bit transform method are compared by taking hardware cost which originates from binarization process into account and experimental results are presented.