Research Information System
22nd IEEE Signal Processing and Communications Applications Conference (SIU), Trabzon, Turkey, 23 - 25 April 2014, pp.2158-2161
In this paper, an embedded hardware architecture for low bit depth representation based motion estimation method is proposed. The proposed hardware architecture can easily be integrated to the microprocessor systems thanks to the industry standard interface. Thus, the developed core has a structure that can be easily utilized as a sub component of state of the art video coding systems. Furthermore, the proposed motion estimation hardware architecture novel to this work The reference motion estimation algorithm is based on the matching of the truncated Gray coded bit planes within an adaptive search range other than the conventional full search approach and it also includes an early termination mechanism to further shorten the search time.